https://www.slideshare.net/niravdesai7121/sata-protocol
https://www.intel.com/assets/pdf/whitepaper/252664.pdf
Host controller (inside southbridge) does the DMA. Issues interrupt to tell the OS that stuff's done. Look at linux srccode for detailed info on how it's setup.
Excellent question. Like I said, things are murky, so here's what I know.
http://www.engadget.com/2011/09/13/andy-rubin-shows-off-medfield-based-android-phone-at-idf-2011-r/
This was a demo of Android 2.3 running on Medfield. Halfway through September.
More recent: intel says 4.0 completely ready; they say they made a port within a day of the source being available. Open source people complain about intel not releasing the source back asap -- both sides make a good point (oss says: oss good, please show what you have; intel says: oss good, but we need to make sure that everything works properly and things don't get fragmented with unofficial releases and later patches).
Now, as far as power goes, you're right that it's hard to pin down a good number. The most recent release seems to have a TDP of 10W, which for a smartphone is obviously huge (compare to 1-2W). However, you hear announcements about this and that and extremely power-efficient things in the pipeline, but I haven't heard tell of a demo showing it yet. I can only repeat what I've read: 1) Intel wants to move standard laptop chips from 35W to 15W, and 2) Intel showed off a very early prototype of a haswell client chip running (and booting into windows...? if I recall correctly) on a pair of solar panels using a 60W light bulb as the light source.
You might want to take a look at this.
https://sourceforge.net/projects/mmi-pd/
the above is the repository for all the public domain versions of IC tools developed by a company called Micro Magic Inc. Maybe it will get you started on IC design without the need of pirating Cadence.
For SPICE level design, you could use the free versions of SPICE simulators like Ngspice and LTSpice. I haven't used SUE before but maybe you could use something like Ngspice with the tools in the link.
For PDKs and model files for transistors, some universities use the Cadence Design Kit (CDK) made by NCSU (also called NCSUCDK). Min length is 0.6um and I think it is based on one of ON semi conductor's processes ( after they acquired AMI). You can get designs fabricated from this PDK though MOSIS.
Aha. That's easy. You can either do LD_LIBRARY_PATH=/root/cadence/installs/IC615/tools.lnx86/lib ./sfk and that should pick the version you got in Cadence.
You can also:
Compile SFK from source. https://sourceforge.net/projects/swissfileknife/files/1-swissfileknife/1.6.5/
Install libstdc++5:i386 (I don't remember if Ubuntu 14 is multiarch or not so this might not work)
Let me know if that doesn't work and I might be able to compile SFK statically for you.
Sounds about right.
The book that got me into analog design literally has “art” in the title.
I was recommended this book which I thought was pretty good. You can find it on libgen and stuff.
I think the methodology as a whole just presents a systematic way for designers to quickly and accurately understand design tradeoffs. Gm/Id itself is just a loose performance vs power spec as far as I understand.
as others have suggested looking at gm/id would be the way to go. also, i would recommend reading the following book or some chapter of it for much better understanding from circuits design perspective. it also has a basic EKV model which is kind of not full blown EKV but good enough for circuits guys.
https://www.amazon.com/Systematic-Design-Analog-CMOS-Circuits-ebook/dp/B075V7X28G
Your university likely has good programs (orcad?).
You can use scheme-it, ltspice or kicad for free.
Or use Google. https://mychartguide.com/best-circuit-diagram-makers/
I believe there are even pretty robust latex schematic approaches that will serve you well in grad school https://www.overleaf.com/learn/latex/CircuiTikz_package
In many cases, it's just an OS kernel update. It's possible to mitigate many of these vulnerabilities by changing how the processor is used (e.g. this). Intel chips have microcode, so that can be used to fix certain bugs. The microcode is loaded into the processor either from the BIOS, or when the OS boots.
This should answer your question. Tegra X1 is currently at the top, we'll see in a few days how that changes.
Maybe Qucs would work for you.
Also you can do anything on Windows via having Parallels. Then the universe of Windows CAD packages is available.
BTW, from you Reddit history, pi would be rational and terminating in a base-pi number system. Who says a number system must be based on whole numbers?? The latter is just an artifact of us having distinct fingers and a whole number obsession. Perhaps a different kind of life form would see mathematics in terms of an irrational number like pi or e instead. E.g. where Euler's Identity was the equivalent of 1+1=2.
>A two-stage opamp topology that turns on and off only the output stage and maintains the charge stored in the Miller capacitance allows higher Fs than do previous implementations.
Quoted from A 1-V 1.8-MHz CMOS switched-opamp SC filter with rail-to-rail output swing
However, I do not quite understand the sentence.